The present invention relates to a semiconductor device, a radio communication terminal using the semiconductor device, and a clock frequency control method.
Recent years, the development of a SoC (System-on-a-Chip) technique that enables circuits capable of providing a plurality of functions to be integrated into one semiconductor chip is in progress. Further, in semiconductor devices using this SoC technique, there are trends to use a multi-core CPU (Central Processing Unit) and to increase the frequency of an operating clock signal.
Incidentally, Japanese Unexamined Patent Application Publication Nos. 11-219237, 11-184554 and 2003-140768 disclose a technique to reduce the power consumption by lowering the frequency of the operating clock signal when, for example, the rate of the operation of the CPU is low.